ΥΠ08 - Computer Architecture
School: Digital Technology
Department: Informatics and Telematics
Course Title: Computer Architecture
Course id: ΥΠ08
Type: Core Course
Teaching and Examination Language: Greek
Is the course offered in Erasmus: Yes
Course web-page: https://eclass.hua.gr/courses/DIT106/
Lectures (Theory): 3,0
Lab lectures: 2,0
ECTS credits: 6,5
The aim of the course is to teach all undergraduate students of the Department the
essential computer organization / architecture background. The student, having already received their necessary prior knowledge on hardware issues at the level of logic gates and up
to high level programming from respective courses, in this course will understant
teaches the organization and design of a computer and the interface between hardware and
software to gain a solid understanding of the concepts that make up
based on modern computers.
The course is essential to all students who are interested in both
hardware design as well as software development.
The course also provides the necessary background for those students who are interested in
take courses related to more advanced architectural concepts
computer and digital systems design.
- Search, analysis and synthesis of data and information with the use of the assorted technologies
● Adaptation in new conditions
● Decision Making
● Independent work
● Team work
● Promoting free, creative and deductive reasoning
Theory: Introduction to basic concepts of organization and computer technology as well as the modern challenges of computer architecture, commands and levels of representation, representation of numerical and non-numerical data, organization of a typical computer, instruction set architecture (ISA), microarchitecture and CISC, MIPS ISA, registers, instruction format and encoding, addressing modes, arithmetic, logic and data transfer functions, program flow control functions, hardware process support, stack usage, basic compilation concepts, performance evaluation and understanding, Amdahl's law, performance calculation, performance analysis, processor design, data path design, cycle implementation, control unit design, general channeling principles, channeling implementation in MIPS processor. Laboratory: Exercises in the ISA of MIPS. Programming in symbolic language. Use of MIPS MARS simulator. Design in Verilog basic elements of micro-arch
itecture of MIPS.
Learning and Teaching Methods - Evaluation
Teaching methods: face-to-face
Use of ICT:
Use of specialized Instruction Set Simulator software.
Use of specialized design and simulation software for digital systems.
Support for the learning process through the electronic e-class platform.
Written final exam (80%) that includes
- Solve design problems using the Verilog language
- Evaluation of theory elements
Evaluation of laboratory exercise reports (20%)
DAVID A. PATTERSON, JOHN L. HENNESSY:" COMPUTER ORGANIZATION AND DESIGN: THE HW/SW INTERFACE "4th edition.
WILLIAM STALLINGS: "COMPUTER ORGANIZATION AND ARCHITECTURE" 10th edition.
SARAH L. HARRIS, DAVID MONEY HARRIS: "DIGITAL DESIGN AND COMPUTER ARCHITECTURE, ARM®"